In order to send time sensitive data, such as voice or video, over asynchronous networks, some method has to be found to synchronize the clock on the receiving side of the network with the clock on the sending side so that the time-sensitive data can be properly reconstructed. ATM (Asynchronous Transfer Mode) provides constant bit (CBR) services for AAL-1 cells. ATM standards allow for the transmission through the network of a time-stamp to convey timing information for this purpose.
Our co-pending application no. PCT/CA95/00320, the contents of which are herein incorporated by reference, describes a clock recovery method based on the maximum buffer fill. The essence of the method described in this application, is to adjust fj such that the average of Lmaxj equals the Target buffer fill level, Lmax, where Li is the sample of the buffer fill level, Lmaxj is the maximum of a number of successive samples of Li, and fj is the derived clock frequency.
The rationale for this method is that while the interfering traffic in the network may frequently create points of substantial congestion, it should also be relatively common for cells to pass through the network without substantial delay. Thus, the minimum of the cell delivery delays for a number of ATM cells should be relatively unaffected by the interfering traffic. Even if this is not completely true, it is reasonable to suppose that phenomena which increase the mean cell transmission delay will also increase the variance of the cell transmission delay, so the minimum delay will undergo a smaller change than the mean delay or the maximum delay. Thus, since cell delivery delay is inversely proportional to the buffer fill level when the cell arrives, it follows that the maximum buffer fill-level is intuitively attractive as a driver of CBCR.
When compared with more traditional approach of using mean buffer fill level, the advantage of using the maximum buffer fill level is large when a single bursty source of interfering ATM traffic periodically swamps the capacity of some point of congestion within the network. In that case the mean buffer fill level observed by the receiving entity will be severely affected by the interfering traffic but the maximum buffer fill level will be relatively unaffected.
A stable reference clock is of fundamental importance to the quality of MPEG2 video. When MPEG2 video services are transported over an ATM network, a means must be provided for matching the clock of the MPEG2 source (the input clock) with the clock for the MPEG2 stream generated on exit from the ATM Network (the output clock). One such means is to periodically transmit the value of a counter in the input device, where the counter is directly dependent on the input clock. The receiver can then match its clock to the sender's clock by tracking successive samples of the counter. Note that it is not necessary for both the transmitter and the receiver to have access to a common network clock. The approach can thus be used in virtually all practical scenarios of operation. This means for clock recovery is part of the MPEG2 standard, and the present invention conforms to that part of the standard.
The ATM Network can have a significant effect on the clock recovery process. There can be variability in the time between sampling the input counter and transmitting a cell that carries the sample. This variability is introduced by the sequencing and relative prioritization of tasks performed within the transmitter. Time-varying queuing delays will occur at points of congestion within the ATM network. Finally, sequencing and relative prioritization of tasks performed within the receiver can cause variability in the time between receiving a cell and comparing its counter sample with the local counter.
Of the three sources of interference mentioned above, queuing delays within the network are generally the most problematic, i.e., cell delay variation (CDV). The other sources of interference are under the control of the system designer and can usually be reduced to a manageable level by proper design. Because of the manner of clock recovery, it is inevitable that CDV will introduce unwanted clock variability.
Prior art approaches trade off tolerance of CDV for speed and ability to track clock variation. The standard approach for effecting this trade-off is to employ linear processing techniques, i.e., low-pass filtering or averaging.
An object of the present invention is to reduce the effects of CDV in a system suitable for MPEG2 and like video services.